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Edem Wornyo, PhD
Edem Wornyo, PhD
IBM
Verified email at intel.com
Title
Cited by
Cited by
Year
Nanoindentation of shape memory polymer networks
E Wornyo, K Gall, F Yang, W King
Polymer 48 (11), 3213-3225, 2007
1202007
Uses of mobile phones in post-conflict Liberia
ML Best, E Wornyo, TN Smyth, J Etherton
2009 International Conference on Information and Communication Technologies …, 2009
562009
Nanoscale indent formation in shape memory polymers using a heated probe tip
F Yang, E Wornyo, K Gall, WP King
Nanotechnology 18 (28), 285302, 2007
332007
Post-conflict communications: The case of Liberia
ML Best, K Jones, I Kondo, D Thakur, E Wornyo, C Yu
Communications of the ACM 50 (10), 33-39, 2007
292007
Thermomechanical formation and recovery of nanoindents in a shape memory polymer studied using a heated tip
F Yang, E Wornyo, K Gall, WP King
Scanning: The Journal of Scanning Microscopies 30 (2), 197-202, 2008
212008
Nanoscale strain storage in a shape memory polymer using a heated probe tip
F Yang, E Wornyo, K Gall, WP King
Nanotechnology 18, 285302, 2007
162007
Modular fuses and antifuses for integrated circuits
JH Zhang, LA Clevenger, C Radens, XU Yiheng, E Wornyo
US Patent 9,240,375, 2016
112016
Through silicon via structure for internal chip cooling
JH Zhang, LA Clevenger, C Radens, XU Yiheng, E Wornyo
US Patent 8,829,670, 2014
92014
Modeling and optimization of the deposition of shape memory polymers for information storage applications
E Wornyo, GS May, K Gall
IEEE transactions on semiconductor manufacturing 22 (3), 409-416, 2009
92009
Competitive and cost effective copper/low-k interconnect (BEOL) for 28 nm CMOS technologies
R Augur, C Child, JH Ahn, TJ Tang, L Clevenger, D Kioussis, H Masuda, ...
Microelectronic engineering 92, 42-44, 2012
52012
Shape memory capacitors for next generation embedded actives
R Doraiswami, E Wornyo, S Bhattacharya, KA Gall
56th Electronic Components and Technology Conference 2006, 3 pp., 2006
52006
Modular fuses and antifuses for integrated circuits
JH Zhang, XU Yiheng, LA Clevenger, C Radens, E Wornyo
US Patent 9,905,511, 2018
22018
Technique for fabrication of microelectronic capacitors and resistors
JH Zhang, LA Clevenger, C Radens, XU Yiheng, E Wornyo
US Patent 9,385,177, 2016
22016
Method for controlling the profile of an etched metallic layer
LA Clevenger, CJ Radens, RS Wise, E Wornyo, XU Yiheng, J Zhang
US Patent 9,209,036, 2015
22015
Technique for fabrication of microelectronic capacitors and resistors
JH Zhang, LA Clevenger, C Radens, XU Yiheng, E Wornyo
US Patent 9,633,986, 2017
12017
Method for controlling the profile of an etched metallic layer
LA Clevenger, CJ Radens, RS Wise, E Wornyo, XU Yiheng, J Zhang
US Patent 9,324,793, 2016
12016
Thickness and uniformity modeling of the deposition of shape memory polymers for information storage applications
E Wornyo, K Gall, GS May
2008 IEEE/SEMI Advanced Semiconductor Manufacturing Conference, 85-89, 2008
12008
Fabrication and characterization of shape memory polymers at small-scales
E Wornyo
Georgia Institute of Technology, 2008
12008
Structure and method for interconnect spatial frequency doubling using selective ridges
JH Zhang, LA Clevenger, C Radens, XU Yiheng, E Wornyo
US Patent 8,889,506, 2014
2014
Process Technology, Characterization, and Optimization-Modeling and Optimization of the Deposition of Shape Memory Polymers for Information Storage Applications
E Wornyo, GS May, K Gall
IEEE Transactions on Semiconductor Manufacturing 22 (3), 409, 2009
2009
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