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M.Senthil Sivakumar
M.Senthil Sivakumar
Asst.Professor of Electronics and Communication, IIIT Tiruchirappalli
Verified email at iiitt.ac.in - Homepage
Title
Cited by
Cited by
Year
Speech controlled automatic wheelchair
MS Sivakumar, J Murji, LD Jacob, F Nyange, M Banupriya
2013 Pan African international conference on information science, computing …, 2013
352013
Design and development of smart Internet of Things–based solid waste management system using computer vision
SS Mookkaiah, G Thangavelu, R Hebbar, N Haldar, H Singh
Environmental Science and Pollution Research 29 (43), 64871-64885, 2022
202022
An area efficient, high-frequency digital built-in self-test for analogue to digital converter
MS Sivakumar, SPJV Rani
International Journal of Electronics 105 (8), 1319-1330, 2018
92018
Design of linear ramp generator for ADC
S Ashwini, MS Sivakumar, SPJV Rani
2017 Fourth International Conference on Signal Processing, Communication and …, 2017
92017
Deep learning in skin lesion analysis for malignant melanoma cancer identification
MS Sivakumar, LM Leo, T Gurumekala, V Sindhu, AS Priyadharshini
Multimedia Tools and Applications 83 (6), 17833-17853, 2024
82024
An ADC BIST using on-chip ramp generation and digital ORA
S Sivakumar M, JVR S P
Microelectronics Journal 81, 8-15, 2018
72018
High Speed Low Power Flash ADC Design for Ultra Wide Band Applications
BM Senthil Sivakumar M
International Journal of Scientific and Engineering Research 3 (5), 6, 2012
72012
Design and analysis of a comparator for flash ADC
M Senthil Sivakumar, M Sowmya Priya
Int J Recent Technol Eng (IJRTE) 7, 2019
62019
“Design of MTCMOS Domino Logic for Ultra Low Power High Performance Ripple Carry Adder”
M Senthil Sivakumar, S Arockia Jayadhas, ER Arputharaj, T
International Journal of Emerging trends in Engineering and Development …, 2013
6*2013
Error detection of data conversion in flash ADC using code width based technique
MS Sivakumar, T Gurumekala, S Pulya
Procedia Computer Science 165, 270-277, 2019
52019
An ADC BIST using on-chip ramp generation and digital ORA
M Senthil Sivakumar, JVR SP
Microelectronics Journal 81, 8-15, 2017
52017
Design of Low Power High Performance 16-Point 2-Parallel Pipelined FFT Architecture
AJS Senthil Sivakumar M, Banupriya M
International Journal of Electronics, Communication & Instrumentation …, 2012
52012
Comparative analysis of the CMOS 180nm technology-based flash ADC designs using dynamic comparator and TIQ comparator
MS Priya, MS Sivakumar, S Pulya
2019 2nd International Conference on Power and Embedded Drive Control …, 2019
42019
Design of digital built-in self-test for analog to digital converter
MS Sivakumar, SPJV Rani
10th International Conference on Intelligent Systems and Control (ISCO) 7-8 …, 2016
42016
Design of low noise active integrated antenna
T Arputharaj, SM Senthil, JS Arockia, M Banupriya
2013 Pan African International Conference on Information Science, Computing …, 2013
42013
Efficient Design of ADC BIST with an Analog Ramp Signal Generation and Digital Error Estimation
M Senthil Sivakumar, SP Joy Vasantha Rani
Journal of Circuits, Systems and Computers, 1950042, 2018
32018
Enhanced Fuzzy Based Clustering Approach for Improving Reliability of WSNs
ART Gurumekala T, Senthil Sivakumar M, Sundaram A
International Journal of Applied Engineering Research (IJAER) 10 (55), 1314-1319, 2015
3*2015
Design of MT-CMOS Domino Logic for Ultra Low Power High Performance Ripple Carry Adder
RE Senthil Sivakumar M, Arockia Jayadhas S
International Journal of Emerging Trends in Engineering and Development …, 2013
32013
Design of digital clock calendar using FPGA
MS Sivakumar, RT Prabu, I Jayanandan
IETE 45th mid term symposium on broadband-technologies and services for …, 2014
22014
Design Consideration of Dual Threshold Logic for High Performance and Ultralow Power Carry Look-Ahead Adder
BM Senthil Sivakumar M
International Journal of Scientific and Engineering Research 3 (6), 6, 2012
22012
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