| An equivalence-checking method for scheduling verification in high-level synthesis C Karfa, D Sarkar, C Mandal, P Kumar IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008 | 78 | 2008 |
| Verification of code motion techniques using value propagation K Banerjee, C Karfa, D Sarkar, C Mandal IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014 | 69 | 2014 |
| Formal verification of code motion techniques using data-flow-driven equivalence checking C Karfa, C Mandal, D Sarkar ACM Transactions on Design Automation of Electronic Systems (TODAES) 17 (3 …, 2012 | 52 | 2012 |
| A formal verification method of scheduling in high-level synthesis C Karfa, C Mandal, D Sarkar, SR Pentakota, C Reade 7th International Symposium on Quality Electronic Design (ISQED'06), 6 pp.-78, 2006 | 52 | 2006 |
| Benchmarking at the frontier of hardware security: Lessons from logic locking B Tan, R Karri, N Limaye, A Sengupta, O Sinanoglu, MM Rahman, ... arXiv preprint arXiv:2006.06806, 2020 | 35 | 2020 |
| Verification of datapath and controller generation phase in high-level synthesis of digital circuits C Karfa, D Sarkar, C Mandal IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010 | 35 | 2010 |
| Verification of loop and arithmetic transformations of array-intensive behaviors C Karfa, K Banerjee, D Sarkar, C Mandal IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013 | 31 | 2013 |
| Is register transfer level locking secure? C Karfa, R Chouksey, C Pilato, S Garg, R Karri 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 550-555, 2020 | 24 | 2020 |
| HMDS: A makespan minimizing DAG scheduler for heterogeneous distributed systems D Senapati, A Sarkar, C Karfa ACM Transactions on Embedded Computing Systems (TECS) 20 (5s), 1-26, 2021 | 16 | 2021 |
| Verification of scheduling of conditional behaviors in high-level synthesis R Chouksey, C Karfa IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (7 …, 2020 | 16 | 2020 |
| Formal modeling of network-on-chip using CFSM and its application in detecting deadlock S Das, C Karfa, S Biswas IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (4 …, 2020 | 14 | 2020 |
| Translation validation of code motion transformations involving loops R Chouksey, C Karfa, P Bhaduri IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 12 | 2018 |
| A value propagation based equivalence checking method for verification of code motion techniques K Banerjee, C Karfa, D Sarkar, C Mandal 2012 International Symposium on Electronic System Design (ISED), 67-71, 2012 | 12 | 2012 |
| Equivalence checking of array-intensive programs C Karfa, K Banerjee, D Sarkar, C Mandal 2011 IEEE Computer Society Annual Symposium on VLSI, 156-161, 2011 | 10 | 2011 |
| FastSim: A fast simulation framework for high-level synthesis M Abderehman, J Patidar, J Oza, Y Nigam, TMA Khader, C Karfa IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 9 | 2021 |
| PRESTO: A Penalty-Aware Real-Time Scheduler for Task Graphs on Heterogeneous Platforms D Senapati, A Sarkar, C Karfa IEEE Transactions on Computers 71 (2), 421-435, 2021 | 8 | 2021 |
| Translation validation of loop invariant code optimizations involving false computations R Chouksey, C Karfa, P Bhaduri VLSI Design and Test: 21st International Symposium, VDAT 2017, Roorkee …, 2017 | 8 | 2017 |
| Hand-in-hand verification of high-level synthesis C Karfa, D Sarkar, C Mandal, C Reade Proceedings of the 17th ACM Great Lakes symposium on VLSI, 429-434, 2007 | 8 | 2007 |
| Corruption exposes you: statistical key recovery from compound logic locking A Kaur, S Saha, C Karfa, D Mukhopadhyay 2022 23rd International Symposium on Quality Electronic Design (ISQED), 1-6, 2022 | 7 | 2022 |
| Secure register allocation for trusted code generation P Panigrahi, V Sahithya, C Karfa, P Mishra IEEE Embedded Systems Letters 14 (3), 127-130, 2022 | 7 | 2022 |
Chittaranjan MandalDept of Computer Sc & Engg, IIT KharagpurVerified email at iitkgp.ac.in
