Wendy Belluomini
Wendy Belluomini
Director - AI and Cognitive Software, IBM Research Almaden
Verified email at
Cited by
Cited by
Cost effective storage using extent based dynamic tiering
J Guerra, H Pucha, J Glider, W Belluomini, R Rangaswami
9th USENIX Conference on File and Storage Technologies (FAST 11), 2011
Data integrity validation in storage systems
VW Deenadhayalan, JL Hafner, JC Wyllie, WA Belluomini
US Patent 7,752,489, 2010
Data integrity validation in storage systems
W Belluomini, JE Bish, K Day III, J Hafner, BS Weber
US Patent 7,873,878, 2011
Data integrity validation in storage systems
VW Deenadhayalan, JL Hafner, JC Wyllie, WA Belluomini
US Patent 8,006,126, 2011
Verification of timed systems using POSETs
W Belluomini, CJ Myers
Computer Aided Verification: 10th International Conference, CAV'98 Vancouver …, 1998
Data integrity validation in a computing environment
JL Hafner, WA Belluomini, DW Dewey, BD McKean, DR Humlicek, ...
US Patent 8,176,405, 2012
Achieving a high throughput in a storage cache application using a flash solid state disk
WA Belluomini, BS Gill, MA Ko
US Patent 8,364,924, 2013
Undetected disk errors in RAID arrays
JL Hafner, V Deenadhayalan, W Belluomini, K Rao
IBM Journal of Research and Development 52 (4.5), 413-425, 2008
Storage system cache using flash memory with direct block access
WA Belluomini, BS Gill, JL Hafner, SR Hetzler, VG Nayar, DF Smith, ...
US Patent 8,583,868, 2013
Energy proportionality for storage: Impact and feasibility
J Guerra, W Belluomini, J Glider, K Gupta, H Pucha
ACM SIGOPS Operating Systems Review 44 (1), 35-39, 2010
Reducing write amplification in a cache with flash memory used as a write cache
WA Belluomini, BS Gill, MA Ko
US Patent 8,386,714, 2013
STOW: A Spatially and Temporally Optimized Write Caching Algorithm.
BS Gill, M Ko, B Debnath, W Belluomini
USENIX Annual Technical Conference, 29-42, 2009
Multi-tier storage system configuration adviser
WA Belluomini, JS Glider, JG Delgado, H Pucha
US Patent 8,706,962, 2014
Timed circuits: A new paradigm for high-speed design
CJ Myers, W Belluomini, K Kallpack, E Peskin, H Zheng
Proceedings of the 2001 Asia and South Pacific Design Automation Conference …, 2001
Evaluating the impact of undetected disk errors in raid systems
EWD Rozier, W Belluomini, V Deenadhayalan, J Hafner, KK Rao, P Zhou
2009 IEEE/IFIP International Conference on Dependable Systems & Networks, 83-92, 2009
Reducing energy consumption and optimizing workload and performance in multi-tier storage systems using extent-level dynamic tiering
WA Belluomini, JS Glider, JG Delgado, H Pucha
US Patent 8,284,627, 2012
Circuits and systems for limited switch dynamic logic
HC Ngo, WA Belluomini, RK Montoye
US Patent 6,650,145, 2003
Limited switch dynamic logic circuits for high-speed low-power circuit design
W Belluomini, D Jamsek, AK Martin, C McDowell, RK Montoye, HC Ngo, ...
IBM journal of research and development 50 (2.3), 277-286, 2006
Timed state space exploration using posets
W Belluomini, CJ Myers
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2000
Method of code coverage utilizing efficient dynamic mutation of logic (EDML)
BS Gill, WA Belluomini
US Patent 8,166,463, 2012
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