An Energy-Efficient Comparator With Dynamic Floating Inverter Amplifier X Tang, L Shen, B Kasap, X Yang, W Shi, A Mukherjee, DZ Pan, N Sun IEEE Journal of Solid-State Circuits, 2020 | 205 | 2020 |
An Energy-Efficient Comparator with Dynamic Floating Inverter Pre-Amplifier X Tang, B Kasap, L Shen, X Yang, W Shi, N Sun 2019 Symposium on VLSI Circuits, C140-C141, 2019 | 205 | 2019 |
A 0.7-V 0.6- 100-kS/s Low-Power SAR ADC With Statistical Estimation-Based Noise Reduction L Chen, X Tang, A Sanyal, Y Yoon, J Cong, N Sun IEEE Journal of Solid-State Circuits 52 (5), 1388-1398, 2017 | 106 | 2017 |
A 13.5-ENOB, 107-μW noise-shaping SAR ADC with PVT-robust closed-loop dynamic amplifier X Tang, X Yang, W Zhao, CK Hsu, J Liu, L Shen, A Mukherjee, W Shi, S Li, ... IEEE Journal of Solid-State Circuits 55 (12), 3248-3259, 2020 | 92 | 2020 |
GeniusRoute: A new analog routing paradigm using generative neural network guidance K Zhu, M Liu, Y Lin, B Xu, S Li, X Tang, N Sun, DZ Pan 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2019 | 83 | 2019 |
MAGICAL: Toward Fully Automated Analog IC Layout Leveraging Human and Machine Intelligence B Xu, K Zhu, M Liu, Y Lin, S Li, X Tang, N Sun, DZ Pan | 81 | 2019 |
Wellgan: Generative-adversarial-network-guided well generation for analog/mixed-signal circuit layout B Xu, Y Lin, X Tang, S Li, L Shen, N Sun, DZ Pan Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 78 | 2019 |
9.3 A 40kHz-BW 90dB-SNDR Noise-Shaping SAR with 4× Passive Gain and 2nd-Order Mismatch Error Shaping J Liu, X Wang, Z Gao, M Zhan, X Tang, N Sun 2020 IEEE International Solid-State Circuits Conference-(ISSCC), 158-160, 2020 | 72 | 2020 |
A 0.025-mm2 0.8-V 78.5-dB SNDR VCO-Based Sensor Readout Circuit in a Hybrid PLL- M Structure W Zhao, S Li, B Xu, X Yang, X Tang, L Shen, N Lu, DZ Pan, N Sun IEEE Journal of Solid-State Circuits 55 (3), 666-679, 2019 | 66 | 2019 |
Low-power SAR ADC design: Overview and survey of state-of-the-art techniques X Tang, J Liu, Y Shen, S Li, L Shen, A Sanyal, K Ragab, N Sun IEEE Transactions on Circuits and Systems I: Regular Papers 69 (6), 2249-2262, 2022 | 64 | 2022 |
MAGICAL: An open-source fully automated analog IC layout system from netlist to GDSII H Chen, M Liu, B Xu, K Zhu, X Tang, S Li, Y Lin, N Sun, DZ Pan IEEE Design & Test 38 (2), 19-26, 2020 | 60 | 2020 |
A 10-b 800-MS/s time-interleaved SAR ADC with fast variance-based timing-skew calibration J Song, K Ragab, X Tang, N Sun IEEE Journal of Solid-State Circuits 52 (10), 2563-2575, 2017 | 60 | 2017 |
A 13-bit 0.005-mm2 40-MS/s SAR ADC With kT/C Noise Cancellation J Liu, X Tang, W Zhao, L Shen, N Sun IEEE Journal of Solid-State Circuits 55 (12), 3260-3270, 2020 | 57 | 2020 |
27.4 A 0.4-to-40MS/s 75.7 dB-SNDR fully dynamic event-driven pipelined ADC with 3-stage cascoded floating inverter amplifier X Tang, X Yang, J Liu, W Shi, DZ Pan, N Sun 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 376-378, 2021 | 56 | 2021 |
Towards decrypting the art of analog layout: Placement quality prediction via transfer learning M Liu, K Zhu, J Gu, L Shen, X Tang, N Sun, DZ Pan 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 496-501, 2020 | 55 | 2020 |
TD-SRAM: Time-domain-based in-memory computing macro for binary neural networks J Song, Y Wang, M Guo, X Ji, K Cheng, Y Hu, X Tang, R Wang, R Huang IEEE Transactions on Circuits and Systems I: Regular Papers 68 (8), 3377-3387, 2021 | 54 | 2021 |
Comparator common-mode variation effects analysis and its application in SAR ADCs L Chen, A Sanyal, J Ma, X Tang, N Sun 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2014-2017, 2016 | 53 | 2016 |
9.5 a 13.5 b-ENOB second-order noise-shaping SAR with PVT-robust closed-loop dynamic amplifier X Tang, X Yang, W Zhao, CK Hsu, J Liu, L Shen, A Mukherjee, W Shi, ... 2020 IEEE International Solid-State Circuits Conference-(ISSCC), 162-164, 2020 | 51 | 2020 |
27.1 A 250kHz-BW 93dB-SNDR 4th-Order Noise-Shaping SAR Using Capacitor Stacking and Dynamic Buffering J Liu, D Li, Y Zhong, X Tang, N Sun 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 369-371, 2021 | 50 | 2021 |
S3DET: Detecting System Symmetry Constraints for Analog Circuits with Graph Similarity M Liu, W Li, K Zhu, B Xu, Y Lin, L Shen, X Tang, N Sun, DZ Pan 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), 193-198, 2020 | 47 | 2020 |