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Vita Pi-Ho Hu
Vita Pi-Ho Hu
Verified email at ntu.edu.tw - Homepage
Title
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Cited by
Year
Analysis of single-trap-induced random telegraph noise and its interaction with work function variation for tunnel FET
ML Fan, VPH Hu, YN Chen, P Su, CT Chuang
IEEE transactions on electron devices 60 (6), 2038-2044, 2013
652013
Analysis of single-trap-induced random telegraph noise on FinFET devices, 6T SRAM cell, and logic circuits
ML Fan, VPH Hu, YN Chen, P Su, CT Chuang
IEEE Transactions on Electron Devices 59 (8), 2227-2234, 2012
622012
Optimization of negative-capacitance vertical-tunnel FET (NCVT-FET)
VPH Hu, HH Lin, YK Lin, C Hu
IEEE Transactions on Electron Devices 67 (6), 2593-2599, 2020
612020
Evaluation of stability, performance of ultra-low voltage MOSFET, TFET, and mixed TFET-MOSFET SRAM cell with write-assist circuits
YN Chen, ML Fan, VPH Hu, P Su, CT Chuang
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 4 (4 …, 2014
562014
Investigation of cell stability and write ability of FinFET subthreshold SRAM using analytical SNM model
ML Fan, YS Wu, VPH Hu, P Su, CT Chuang
IEEE Transactions on Electron Devices 57 (6), 1375-1381, 2010
542010
Comparison of 4T and 6T FinFET SRAM cells for subthreshold operation considering variability—A model-based approach
ML Fan, YS Wu, VPH Hu, CY Hsieh, P Su, CT Chuang
Electron Devices, IEEE Transactions on 58 (3), 609-616, 2011
512011
Independently-controlled-gate FinFET Schmitt trigger sub-threshold SRAMs
CY Hsieh, ML Fan, VPH Hu, P Su, CT Chuang
IEEE Transactions on very large scale integration (VLSI) systems 20 (7 …, 2011
482011
Design and analysis of robust tunneling FET SRAM
YN Chen, ML Fan, VPH Hu, P Su, CT Chuang
IEEE transactions on electron devices 60 (3), 1092-1098, 2013
442013
FinFET SRAM cell optimization considering temporal variability due to NBTI/PBTI, surface orientation and various gate dielectrics
VPH Hu, ML Fan, CY Hsieh, P Su, CT Chuang
IEEE Transactions on Electron Devices 58 (3), 805-811, 2011
402011
Negative capacitance enables FinFET and FDSOI scaling to 2 nm node
VPH Hu, PC Chiu, AB Sachid, C Hu
2017 IEEE International Electron Devices Meeting (IEDM), 23.1. 1-23.1. 4, 2017
362017
Single-trap-induced random telegraph noise for FinFET, Si/Ge Nanowire FET, Tunnel FET, SRAM and logic circuits
ML Fan, SY Yang, VPH Hu, YN Chen, P Su, CT Chuang
Microelectronics Reliability 54 (4), 698-711, 2014
292014
Investigation of electrostatic integrity for ultra-thin-body GeOI MOSFET using analytical solution of Poisson's equation
VPH Hu, YS Wu, P Su
Semiconductor Science and Technology 24 (4), 045017, 2009
292009
Impacts of work function variation and line-edge roughness on TFET and FinFET devices and 32-bit CLA circuits
YN Chen, CJ Chen, ML Fan, VPH Hu, P Su, CT Chuang
Journal of Low Power Electronics and Applications 5 (2), 101-115, 2015
282015
Comparative leakage analysis of GeOI FinFET and Ge bulk FinFET
VPH Hu, ML Fan, P Su, CT Chuang
IEEE transactions on electron devices 60 (10), 3596-3600, 2013
262013
Impact of quantum confinement on short-channel effects for ultrathin-body Germanium-on-insulator MOSFETs
YS Wu, HY Hsieh, VPH Hu, P Su
Electron Device Letters, IEEE 32 (1), 18-20, 2011
262011
Impact of work function variation, line-edge roughness, and ferroelectric properties variation on negative capacitance FETs
VPH Hu, PC Chiu, YC Lu
IEEE Journal of the Electron Devices Society 7, 295-302, 2019
252019
Analysis of GeOI FinFET 6T SRAM cells with variation-tolerant WLUD read-assist and TVC write-assist
VPH Hu, ML Fan, P Su, CT Chuang
IEEE Transactions on Electron Devices 62 (6), 1710-1715, 2015
252015
Split-gate FeFET (SG-FeFET) with dynamic memory window modulation for non-volatile memory and neuromorphic applications
VPH Hu, HH Lin, ZA Zheng, ZT Lin, YC Lu, LY Ho, YW Lee, CW Su, CJ Su
2019 Symposium on VLSI Technology, T134-T135, 2019
242019
Investigation and simulation of work-function variation for III–V broken-gap heterojunction tunnel FET
CW Hsu, ML Fan, VPH Hu, P Su
IEEE Journal of the Electron Devices Society 3 (3), 194-199, 2015
232015
Investigation of backgate-biasing effect for ultrathin-body III-V heterojunction tunnel FET
ML Fan, VPH Hu, YN Chen, CW Hsu, P Su, CT Chuang
IEEE Transactions on Electron Devices 62 (1), 107-113, 2014
232014
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