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Mary Breton
Mary Breton
Testsite Layout & Design Manager, IBM
Verified email at us.ibm.com - Homepage
Title
Cited by
Cited by
Year
A novel dry selective etch of SiGe for the enablement of high performance logic stacked gate-all-around nanosheet devices
N Loubet, S Kal, C Alix, S Pancharatnam, H Zhou, C Durfee, M Belyansky, ...
2019 IEEE International Electron Devices Meeting (IEDM), 11.4. 1-11.4. 4, 2019
682019
EUV patterning successes and frontiers
N Felix, D Corliss, K Petrillo, N Saulnier, Y Xu, L Meli, H Tang, A De Silva, ...
Extreme Ultraviolet (EUV) Lithography VII 9776, 480-486, 2016
392016
A direct fusion drive for rocket propulsion
YS Razin, G Pajer, M Breton, E Ham, J Mueller, M Paluszek, AH Glasser, ...
Acta Astronautica 105 (1), 145-155, 2014
372014
Review of nanosheet metrology opportunities for technology readiness
MA Breton, D Schmidt, A Greene, J Frougier, N Felix
Journal of Micro/Nanopatterning, Materials, and Metrology 21 (2), 021206-021206, 2022
172022
Electrical test prediction using hybrid metrology and machine learning
M Breton, R Chao, GR Muthinti, AA de la Peña, J Simon, AJ Cepler, ...
Metrology, Inspection, and Process Control for Microlithography XXXI 10145 …, 2017
172017
Advanced in-line metrology strategy for self-aligned quadruple patterning
R Chao, M Breton, B L'herron, B Mendoza, R Muthinti, F Nelson, ...
SPIE Proceedings 9778 (13), 2016
142016
Machine learning and hybrid metrology using scatterometry and LE-XRF to detect voids in copper lines
D Kong, K Motoyama, H Huang, B Mendoza, M Breton, GR Muthinti, ...
Metrology, Inspection, and Process Control for Microlithography XXXIII 10959 …, 2019
122019
Measuring local CD uniformity in EUV vias with scatterometry and machine learning
D Kong, D Schmidt, J Church, CC Liu, M Breton, C Murray, E Miller, L Meli, ...
Metrology, Inspection, and Process Control for Microlithography XXXIV 11325 …, 2020
112020
Modular aneutronic fusion engine
G Pajer, Y Razin, M Paluszek, AH Glasser, S Cohen
Space Propulsion, 2012
102012
Development of SiGe indentation process control for gate-all-around FET technology enablement
D Schmidt, A Cepler, C Durfee, S Pancharatnam, J Frougier, M Breton, ...
IEEE Transactions on Semiconductor Manufacturing 35 (3), 412-417, 2022
92022
In-line characterization of non-selective SiGe nodule defects with scatterometry enabled by machine learning
D Kong, R Chao, M Breton, C Liu, GR Muthinti, S Seo, NJ Loubet, ...
Metrology, Inspection, and Process Control for Microlithography XXXII 10585 …, 2018
92018
Structural and electrical demonstration of SiGe cladded channel for PMOS stacked nanosheet gate-all-around devices
S Mochizuki, B Colombeau, J Zhang, SC Kung, M Stolfi, H Zhou, M Breton, ...
2020 IEEE Symposium on VLSI Technology, 1-2, 2020
82020
Resist shrink characterization methodology for more accurate CD metrology
MA Breton, K Petrillo, J Church, L Meli, J Fullam, S Sieg, R Lallement, ...
Metrology, Inspection, and Process Control XXXVI, PC120530C, 2022
62022
Advanced EUV resist characterization using scatterometry and machine learning
D Schmidt, K Petrillo, M Breton, J Fullam, R Koret, I Turovets, A Cepler
2021 32nd Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC …, 2021
62021
Fundamental characterization of stochastic variation for improved single-expose EUV patterning at aggressive pitch
J Church, L Meli, J Guo, M Burkhardt, C Mack, A DeSilva, K Petrillo, ...
Extreme Ultraviolet (EUV) Lithography XI 11323, 165-173, 2020
62020
Line top loss and line top roughness characterizations of EUV resists
D Schmidt, K Petrillo, M Breton, J Fullam, S Hand, J Osborne, W Wang, ...
Metrology, Inspection, and Process Control for Microlithography XXXIV 11325 …, 2020
62020
Highly selective SiGe dry etch process for the enablement of stacked nanosheet gate-all-around transistors
C Durfee, S Kal, S Pancharatnam, M Bhuiyan, I Otto IV, M Flaugh, J Smith, ...
ECS Transactions 104 (4), 217, 2021
52021
Study of TiN and TaN underlayer properties and their influence on W growth
S Pancharatnam, G Karve, J Wynne, B Mendoza, S DeVries, RN Pujari, ...
IEEE Transactions on Semiconductor Manufacturing 32 (4), 374-380, 2019
52019
Performance of stacked nanosheet gate all around FET’s with EUV patterned gate and sheets
I Seshadri, J Church, P Hundekar, M Breton, J Zhang, E Miller, A Greene, ...
Extreme Ultraviolet (EUV) Lithography XII 11609, 116090S, 2021
42021
Development of SiGe indentation process control to enable stacked Nanosheet FET technology
D Kong, D Schmidt, M Breton, J Frougier, A Greene, J Zhang, V Basker, ...
2020 31st Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC …, 2020
42020
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