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Wei Shi (施为)
Wei Shi (施为)
Meta AI
Verified email at utexas.edu
Title
Cited by
Cited by
Year
An energy-efficient comparator with dynamic floating inverter amplifier
X Tang, L Shen, B Kasap, X Yang, W Shi, A Mukherjee, DZ Pan, N Sun
IEEE Journal of Solid-State Circuits 55 (4), 1011-1022, 2020
1872020
A 13.5-ENOB, 107-μW noise-shaping SAR ADC with PVT-robust closed-loop dynamic amplifier
X Tang, X Yang, W Zhao, CK Hsu, J Liu, L Shen, A Mukherjee, W Shi, S Li, ...
IEEE Journal of Solid-State Circuits 55 (12), 3248-3259, 2020
742020
An efficient analog circuit sizing method based on machine learning assisted global optimization
AF Budak, M Gandara, W Shi, DZ Pan, N Sun, B Liu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021
572021
27.4 A 0.4-to-40MS/s 75.7 dB-SNDR fully dynamic event-driven pipelined ADC with 3-stage cascoded floating inverter amplifier
X Tang, X Yang, J Liu, W Shi, DZ Pan, N Sun
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 376-378, 2021
502021
9.5 a 13.5 b-ENOB second-order noise-shaping SAR with PVT-robust closed-loop dynamic amplifier
X Tang, X Yang, W Zhao, CK Hsu, J Liu, L Shen, A Mukherjee, W Shi, ...
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 162-164, 2020
452020
A two-step ADC with a continuous-time SAR-based first stage
L Shen, Y Shen, Z Li, W Shi, X Tang, S Li, W Zhao, M Zhang, Z Zhu, N Sun
IEEE Journal of Solid-State Circuits 54 (12), 3375-3385, 2019
282019
Closing the design loop: Bayesian optimization assisted hierarchical analog layout synthesis
M Liu, K Zhu, X Tang, B Xu, W Shi, N Sun, DZ Pan
2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020
262020
3.4 A 0.01mm2 25µW 2MS/s 74dB-SNDR Continuous-Time Pipelined-SAR ADC with 120fF Input Capacitor
L Shen, Y Shen, X Tang, CK Hsu, W Shi, S Li, W Zhao, A Mukherjee, ...
2019 IEEE International Solid-State Circuits Conference-(ISSCC), 64-66, 2019
202019
27.7 A 79dB-SNDR 167dB-FoM bandpass ΔΣ ADC combining N-path filter with noise-shaping SAR
L Shen, Z Gao, X Yang, W Shi, N Sun
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 382-384, 2021
142021
10.4 A 3.7 mW 12.5 MHz 81dB-SNDR 4th-order CTDSM with single-OTA and 2nd-order NS-SAR
W Shi, J Liu, A Mukherjee, X Yang, X Tang, L Shen, W Zhao, N Sun
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 170-172, 2021
122021
Robustanalog: Fast variation-aware analog circuit design via multi-task rl
W Shi, H Wang, J Gu, M Liu, DZ Pan, S Han, N Sun
Proceedings of the 2022 ACM/IEEE Workshop on Machine Learning for CAD, 35-41, 2022
102022
Generative-adversarial-network-guided well-aware placement for analog circuits
K Zhu, H Chen, M Liu, X Tang, W Shi, N Sun, DZ Pan
2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC), 519-525, 2022
92022
Machine learning for analog circuit sizing
AF Budak, S Zhang, M Liu, W Shi, K Zhu, DZ Pan
Machine Learning Applications in Electronic Design Automation, 307-335, 2022
72022
CAD for Analog/Mixed‐Signal Integrated Circuits
AF Budak, DZ Pan, H Chen, K Zhu, M Liu, MB Alawieh, S Zhang, W Shi, ...
Advances in Semiconductor Technologies: Selected Topics Beyond Conventional …, 2022
62022
A Bandwidth-Adaptive Pipelined SAR ADC With Three-Stage Cascoded Floating Inverter Amplifier
X Tang, X Yang, J Liu, Z Wang, W Shi, DZ Pan, N Sun
IEEE Journal of Solid-State Circuits 58 (9), 2564-2574, 2023
52023
A 3.7-mW 12.5-MHz 81-dB SNDR 4th-order continuous-time DSM with single-OTA and 2nd-order noise-shaping SAR
W Shi, J Liu, A Mukherjee, X Yang, X Tang, L Shen, W Zhao, N Sun
IEEE Open Journal of the Solid-State Circuits Society 2, 122-134, 2022
52022
A 0.37mm2 250kHz-BW 95dB-SNDR CTDSM with Low-Cost 2nd-order Vector-Quantizer DEM
W Shi, X Wang, X Tang, A Mukherjee, R Theertham, S Pavan, L Jie, ...
2022 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2022
42022
A wireless implantable opto-electro neural interface ASIC for simultaneous neural recording and stimulation
L Zhao, Y Gong, W Shi, R Stephany, W Li, Y Jia
2023 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2023
32023
RoDesigner: Variation-Aware Optimization for Robust Analog Design with Multi-Task RL
W Shi, H Wang, J Gu, M Liu, DZ Pan, S Han, N Sun
22021
Design and automation techniques for hIgh-performance mixed-signal circuits
W Shi
2022
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