Eby G. Friedman

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Avinoam KolodnyProfessor of Electrical and Computer Engineering, TechnionVerified email at ee.technion.ac.il
Mikhail PopovichVerified email at google.com
Yehea IsmailProfessor, the American University in Cairo, zewail cityVerified email at aucegypt.edu
Selçuk KöseUniversity of RochesterVerified email at ur.rochester.edu
Shahar KvatinskyTechnion - Israel Institute of TechnologyVerified email at ee.technion.ac.il
Volkan KursunVisiting Professor, Bilkent UniversityVerified email at bilkent.edu.tr
Ioannis SavidisAssociate Professor, Drexel UniversityVerified email at coe.drexel.edu
Uri WeiserProfessor, TechnionVerified email at ee.technion.ac.il
Vasilis F. PavlidisComputer Science and University of ManchesterVerified email at cs.man.ac.uk
Guoqing ChenSMTS at AMDVerified email at amd.com
Ivan KourtevVerified email at google.com
Engin IpekPrincipal Engineer, Qualcomm Platform ArchitectureVerified email at cs.rochester.edu
Emre SalmanProfessor of Electrical and Computer Engineering, Stony Brook UniversityVerified email at stonybrook.edu
Gleb KrylovPostdoctoral Researcher, Walther-Meissner-InstitutVerified email at tum.de
Kris GajGeorge Mason UniversityVerified email at gmu.edu
Magdy A. El-MoursyAssociate Professor of Microelectronics, Electronics Research InstituteVerified email at mentor.com
Mikhail HaurylauDirector, Systems Engineering, ONTO InnovationVerified email at kla-tencor.com
philippe fauchetVerified email at vanderbilt.edu
Siva NarendraTyfone, Inc.Verified email at tyfone.com
Vivek DeIntel Fellow, Intel CorporationVerified email at intel.com

Eby G. Friedman

Distinguished Professor, University of Rochester

Verified email at ece.rochester.edu - Homepage

Integrated circuits VLSI Design automation


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TEAM: Threshold adaptive memristor model S Kvatinsky, EG Friedman, A Kolodny, UC Weiser IEEE transactions on circuits and systems I: regular papers 60 (1), 211-221, 2012	850	2012
MAGIC—Memristor-aided logic S Kvatinsky, D Belousov, S Liman, G Satat, N Wald, EG Friedman, ... IEEE Transactions on Circuits and Systems II: Express Briefs 61 (11), 895-899, 2014	744	2014
VTEAM: A general model for voltage-controlled memristors S Kvatinsky, M Ramadan, EG Friedman, A Kolodny IEEE Transactions on Circuits and Systems II: Express Briefs 62 (8), 786-790, 2015	691	2015
Memristor-based material implication (IMPLY) logic: Design principles and methodologies S Kvatinsky, G Satat, N Wald, EG Friedman, A Kolodny, UC Weiser IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (10 …, 2013	637	2013
Clock distribution networks in synchronous digital integrated circuits EG Friedman Proceedings of the IEEE 89 (5), 665-692, 2001	634	2001
3-D topologies for networks-on-chip VF Pavlidis, EG Friedman IEEE transactions on very large scale integration (VLSI) systems 15 (10 …, 2007	586	2007
Effects of inductance on the propagation delay and repeater insertion in VLSI circuits YI Ismail, EG Friedman Proceedings of the 36th annual ACM/IEEE Design Automation Conference, 721-724, 1999	535	1999
On-chip optical interconnect roadmap: Challenges and critical directions M Haurylau, G Chen, H Chen, J Zhang, NA Nelson, DH Albonesi, ... IEEE Journal of Selected Topics in Quantum Electronics 12 (6), 1699-1705, 2006	533	2006
Three-dimensional integrated circuit design VF Pavlidis, I Savidis, EG Friedman Newnes, 2017	453	2017
Multi-Voltage CMOS Circuit Design V Kursun, EG Friedman Multi-Voltage CMOS Circuit Design, i-xv, 2006	384	2006
Figures of merit to characterize the importance of on-chip inductance YI Ismail, EG Friedman, JL Neves Proceedings of the 35th annual Design Automation Conference, 560-565, 1998	380	1998
Equivalent Elmore delay for RLC trees YI Ismail, EG Friedman, JL Neves Proceedings of the 36th annual ACM/IEEE Design Automation Conference, 715-720, 1999	335	1999
MRL—Memristor ratioed logic S Kvatinsky, N Wald, G Satat, A Kolodny, UC Weiser, EG Friedman 2012 13th International Workshop on Cellular Nanoscale Networks and their …, 2012	323	2012
Repeater design to reduce delay and power in resistive interconnect V Adler, EG Friedman IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 1998	300	1998
Predictions of CMOS compatible on-chip optical interconnect G Chen, H Chen, M Haurylau, N Nelson, PM Fauchet, EG Friedman, ... Proceedings of the 2005 international workshop on System level interconnect …, 2005	298	2005
Power distribution networks with on-chip decoupling capacitors M Popovich, A Mezhiba, EG Friedman Springer Science & Business Media, 2007	286	2007
Closed-form expressions of 3-D via resistance, inductance, and capacitance I Savidis, EG Friedman IEEE Transactions on Electron Devices 56 (9), 1873-1881, 2009	241	2009
Clock Distribution Networks VLSI Circuits and Systems EG Friedman A Selected Reprint Volume, 1995	236	1995
Dynamically tuning processor resources with adaptive processing DH Albonesi, R Balasubramonian, SG Dropsbo, S Dwarkadas, ... Computer 36 (12), 49-58, 2003	213	2003
Memristor-based IMPLY logic design procedure S Kvatinsky, A Kolodny, UC Weiser, EG Friedman 2011 IEEE 29th International Conference on Computer Design (ICCD), 142-147, 2011	187	2011

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