Shimeng Yu
Cited by
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Metal–oxide RRAM
HSP Wong, HY Lee, S Yu, YS Chen, Y Wu, PS Chen, B Lee, FT Chen, ...
Proceedings of the IEEE 100 (6), 1951-1970, 2012
Synaptic electronics: materials, devices and applications
D Kuzum, S Yu, HSP Wong
Nanotechnology 24 (38), 382001, 2013
Neuro-inspired computing with emerging nonvolatile memorys
S Yu
Proceedings of the IEEE 106 (2), 260-285, 2018
Optoelectronic resistive random access memory for neuromorphic vision sensors
F Zhou, Z Zhou, J Chen, TH Choy, J Wang, N Zhang, Z Lin, S Yu, J Kang, ...
Nature nanotechnology 14 (8), 776-782, 2019
An Electronic Synapse Device Based on Metal Oxide Resistive Switching Memory for Neuromorphic Computation
S Yu, Y Wu, R Jeyasingh, D Kuzum, HSP Wong
Electron Devices, IEEE Transactions on, 1-9, 2011
SiGe epitaxial memory for neuromorphic computing with reproducible high performance based on engineered dislocations
S Choi, SH Tan, Z Li, Y Kim, C Choi, PY Chen, H Yeon, S Yu, J Kim
Nature materials 17 (4), 335-340, 2018
Emerging memory technologies: Recent trends and prospects
S Yu, PY Chen
IEEE Solid-State Circuits Magazine 8 (2), 43-56, 2016
Neuro-inspired computing chips
W Zhang, B Gao, J Tang, P Yao, S Yu, MF Chang, HJ Yoo, H Qian, H Wu
Nature electronics 3 (7), 371-382, 2020
A low energy oxide‐based electronic synaptic device for neuromorphic visual systems with tolerance to device variation
S Yu, B Gao, Z Fang, H Yu, J Kang, HSP Wong
Advanced Materials 25 (12), 1774-1779, 2013
Ferroelectric FET analog synapse for acceleration of deep neural network training
M Jerry, PY Chen, J Zhang, P Sharma, K Ni, S Yu, S Datta
2017 IEEE international electron devices meeting (IEDM), 6.2. 1-6.2. 4, 2017
Conduction mechanism of TiN/HfOx/Pt resistive switching memory: A trap-assisted-tunneling model
S Yu, X Guan, HSP Wong
Applied Physics Letters 99, 063507, 2011
NeuroSim: A circuit-level macro model for benchmarking neuro-inspired architectures in online learning
PY Chen, X Peng, S Yu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018
Overcoming the challenges of crossbar resistive memory architectures
C Xu, D Niu, N Muralimanohar, R Balasubramonian, T Zhang, S Yu, Y Xie
2015 IEEE 21st international symposium on high performance computer …, 2015
HfOx-Based Vertical Resistive Switching Random Access Memory Suitable for Bit-Cost-Effective Three-Dimensional Cross-Point Architecture
S Yu, HY Chen, B Gao, J Kang, HSP Wong
ACS nano 7 (3), 2320-2325, 2013
HfOx based vertical resistive random access memory for cost-effective 3D cross-point architecture without cell selector
HY Chen, S Yu, B Gao, P Huang, J Kang, HSP Wong
2012 international electron devices meeting, 20.7. 1-20.7. 4, 2012
On the switching parameter variation of metal-oxide RRAM—Part I: Physical modeling and simulation methodology
X Guan, S Yu, HSP Wong
IEEE Transactions on electron devices 59 (4), 1172-1182, 2012
Investigating the switching dynamics and multilevel capability of bipolar metal oxide resistive switching memory
S Yu, Y Wu, HSP Wong
Applied Physics Letters 98, 103514, 2011
NeuroSim+: An integrated device-to-algorithm framework for benchmarking synaptic devices and array architectures
PY Chen, X Peng, S Yu
2017 IEEE International Electron Devices Meeting (IEDM), 6.1. 1-6.1. 4, 2017
Compact modeling of RRAM devices and its applications in 1T1R and 1S1R array design
PY Chen, S Yu
IEEE Transactions on Electron Devices 62 (12), 4022-4028, 2015
A SPICE compact model of metal oxide resistive switching memory with variations
X Guan, S Yu, HSP Wong
IEEE electron device letters 33 (10), 1405-1407, 2012
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