K Rim
K Rim
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Cited by
Cited by
Silicon device scaling to the sub-10-nm regime
M Ieong, B Doris, J Kedzierski, K Rim, M Yang
Science 306 (5704), 2057-2060, 2004
Six-band calculation of the hole mobility in silicon inversion layers: Dependence on surface orientation, strain, and silicon thickness
MV Fischetti, Z Ren, PM Solomon, M Yang, K Rim
Journal of Applied Physics 94 (2), 1079-1095, 2003
Fabrication and analysis of deep submicron strained-Si n-MOSFET's
K Rim, JL Hoyt, JF Gibbons
IEEE Transactions on Electron Devices 47 (7), 1406-1415, 2000
Characteristics and device design of sub-100 nm strained Si N-and PMOSFETs
K Rim, J Chu, H Chen, KA Jenkins, T Kanarsky, K Lee, A Mocuta, H Zhu, ...
2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No …, 2002
Ultrathin high-K gate stacks for advanced CMOS devices
EP Gusev, DA Buchanan, E Cartier, A Kumar, D DiMaria, S Guha, ...
International Electron Devices Meeting. Technical Digest (Cat. No. 01CH37224 …, 2001
Strained Si NMOSFETs for high performance CMOS technology
K Rim, S Koester, M Hargrove, J Chu, PM Mooney, J Ott, T Kanarsky, ...
2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No …, 2001
Transconductance enhancement in deep submicron strained Si n-MOSFETs
K Rim, JL Hoyt, JF Gibbons
International Electron Devices Meeting 1998. Technical Digest (Cat. No …, 1998
Fabrication and mobility characteristics of ultra-thin strained Si directly on insulator (SSDOI) MOSFETs
K Rim, K Chan, L Shi, D Boyd, J Ott, N Klymko, F Cardone, L Tai, ...
IEEE International Electron Devices Meeting 2003, 3.1. 1-3.1. 4, 2003
Enhanced hole mobilities in surface-channel strained-Si p-MOSFETs
K Rim, J Welser, JL Hoyt, JF Gibbons
Proceedings of International Electron Devices Meeting, 517-520, 1995
High-performance CMOS devices on hybrid crystal oriented substrates
BB Doris, KW Guarini, M Ieong, S Narasimha, K Rim, JW Sleight, M Yang
US Patent 7,329,923, 2008
Strained silicon on insulator structures
K Rim
US Patent 6,603,156, 2003
80 nm polysilicon gated n-FETs with ultra-thin Al/sub 2/O/sub 3/gate dielectric for ULSI applications
DA Buchanan, EP Gusev, E Cartier, H Okorn-Schmidt, K Rim, ...
International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No …, 2000
Structure and method for mobility enhanced MOSFETs with unalloyed silicide
Y Liu, D Chidambarrao, O Gluschenkov, JR Holt, RT Mo, K Rim
US Patent 8,217,423, 2012
Strained Si CMOS (SS CMOS) technology: opportunities and challenges
K Rim, R Anderson, D Boyd, F Cardone, K Chan, H Chen, S Christansen, ...
Solid-State Electronics 47 (7), 1133-1139, 2003
Semiconductor-on-insulator lateral pin photodetector with a reflecting mirror and backside contact and method for forming the same
GM Cohen, K Rim, DL Rogers, JD Schaub, M Yang
US Patent 6,667,528, 2003
Laser surface annealing of antimony doped amorphized semiconductor region
D Chidambarrao, S Jain, W Henson, K Rim
US Patent App. 11/308,108, 2007
Strained silicon CMOS on hybrid crystal orientations
KK Chan, M Ieong, A Reznicek, DK Sadana, L Shi, M Yang
US Patent 7,087,965, 2006
Strained-silicon CMOS device and method
A Bryant, Q Ouyang, K Rim
US Patent 7,227,205, 2007
Strained-silicon CMOS device and method
A Bryant, Q Ouyang, K Rim
US Patent 7,227,205, 2007
Integration and optimization of embedded-SiGe, compressive and tensile stressed liner films, and stress memorization in advanced SOI CMOS technologies
LT Su, J Pellerin, SF Huang, M Khare, D Schepis, K Rim, S Liming, ...
IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest …, 2005
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