Ajay Joshi
Ajay Joshi
Professor, ECE Department, Boston University
Verified email at - Homepage
Cited by
Cited by
Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics
C Batten, A Joshi, J Orcutt, A Khilo, B Moss, CW Holzwarth, MA Popovic, ...
IEEE Micro 29 (4), 8-21, 2009
Silicon-photonic clos networks for global on-chip communication
A Joshi, C Batten, YJ Kwon, S Beamer, I Shamim, K Asanovic, ...
2009 3rd ACM/IEEE International Symposium on Networks-on-Chip, 124-133, 2009
Re-architecting DRAM memory systems with monolithically integrated silicon photonics
S Beamer, C Sun, YJ Kwon, A Joshi, C Batten, V Stojanović, K Asanović
ACM SIGARCH Computer Architecture News 38 (3), 129-140, 2010
Design and Optimization of Nonvolatile Multibit 1T1R Resistive RAM
M Zangeneh, A Joshi
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on 22 (8 …, 2014
Hardware performance counters can detect malware: Myth or fact?
B Zhou, A Gupta, R Jahanshahi, M Egele, A Joshi
Asia Conference on Computer and Communications Security, 457-468, 2018
Designing chip-level nanophotonic interconnection networks
C Batten, A Joshi, V Stojanovć, K Asanović
Integrated Optical Interconnect Architectures for Embedded Systems, 81-135, 2013
MGPUSim: Enabling Multi-GPU Performance Modeling and Optimization
Y Sun, T Baruah, SA Mojumder, S Dong, X Gong, S Treadway, Y Bao, ...
International Symposium on Computer Architecture (ISCA), 2019
BlackParrot: An agile open-source RISC-V multicore for accelerator SoCs
D Petrisko, F Gilani, M Wyse, DC Jung, S Davidson, P Gao, C Zhao, ...
IEEE Micro 40 (4), 93-102, 2020
Runtime Management of Laser Power in Silicon-Photonic Multibus NoC Architecture
C Chen, A Joshi
Selected Topics in Quantum Electronics, IEEE Journal of 19 (2), 2013
Thermal management of manycore systems with silicon-photonic networks
T Zhang, JL Abellán, A Joshi, AK Coskun
Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014 …, 2014
Towards Deep Learning using TensorFlow Lite on RISC-V
MS Louis, Z Azad, L Delshadtehrani, S Gupta, P Warden, VJ Reddi, ...
Proc. Workshop on Computer Architecture Research with RISC-V (CARRV), 2019
FAB: An FPGA-based accelerator for bootstrappable fully homomorphic encryption
R Agrawal, L de Castro, G Yang, C Juvekar, R Yazicigil, A Chandrakasan, ...
2023 IEEE International Symposium on High-Performance Computer Architecture …, 2023
Detecting hardware trojans using backside optical imaging of embedded watermarks
B Zhou, R Adato, M Zangeneh, T Yang, A Uyar, B Goldberg, S Unlu, ...
Proceedings of the 52nd Annual Design Automation Conference (DAC), 111, 2015
An electro-photonic system for accelerating deep neural networks
C Demirkiran, F Eris, G Wang, J Elmhurst, N Moore, NC Harris, ...
ACM Journal on Emerging Technologies in Computing Systems 19 (4), 1-31, 2023
Asymmetric NoC Architectures for GPU Systems
AKK Ziabari, JL Abellán, Y Ma, A Joshi, D Kaeli
Network-on-chip Symposium (NOCS), 2015
Profiling DNN Workloads on a Volta-based DGX-1 System
SA Mojumder, MS Louis, Y Sun, AK Ziabari, JL Abellán, J Kim, D Kaeli, ...
IEEE International Symposium on Workload Characterization (IISWC), 2018
Griffin: Hardware-Software Support for Efficient Page Migration in Multi-GPU Systems
T Baruah, Y Sun, A Dincer, S Mojumder, J Abellan, Y Ukidave, A Joshi, ...
International Symposium on High-Performance Computer Architecture (HPCA), 2020
Sharing and Placement of On-chip Laser Sources in Silicon-Photonic NoCs
C Chen, T Zhang, P Contu, J Klamkin, AK Coskun, A Joshi
International Symposium on Networks-on-Chip (NOCS), 2014
PHMon: A Programmable Hardware Monitor and Its Security Use Cases
L Delshadtehrani, S Canakci, B Zhou, S Eldridge, A Joshi, M Egele
USENIX Security 2020, 2020
Leveraging silicon-photonic NoC for designing scalable GPUs
AKK Ziabari, JL Abellán, R Ubal, C Chen, A Joshi, D Kaeli
Proceedings of the 29th ACM on International Conference on Supercomputing …, 2015
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