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Asmita Pal
Asmita Pal
Verified email at wisc.edu
Title
Cited by
Cited by
Year
Split Latency Allocator: Process Variation-Aware Register Access Latency Boost in a Near-Threshold Graphics Processing Unit
A Pal, A Bal, K Chakraborty, S Roy
Journal of Low Power Electronics 13 (3), 419-427, 2017
22017
As-Is Approximate Computing
M Soni, A Pal, JS Miguel
ACM Transactions on Architecture and Code Optimization 20 (1), 1-26, 2022
12022
Camouflage: Utility-Aware Obfuscation for Accurate Simulation of Sensitive Program Traces
A Pal, K Desai, R Chatterjee, JS Miguel
ACM Transactions on Architecture and Code Optimization, 2023
2023
Reliability and Uniformity Enhancement in 8T-SRAM based PUFs operating at NTC
P Pandey, A Pal, K Chakraborty, S Roy
Proceedings of the International Symposium on Low Power Electronics and …, 2018
2018
Characterizing Memory Side Channels in FHE Applications
A Pal, K Swaminathan, S Pal, J San Miguel
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Articles 1–5