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Adam Neale
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A new SEC-DED error correction code subclass for adjacent MBU tolerance in embedded memory
A Neale, M Sachdev
IEEE Transactions on Device and Materials Reliability 13 (1), 223-230, 2012
1072012
Adjacent-MBU-tolerant SEC-DED-TAEC-yAED codes for embedded SRAMs
A Neale, M Jonkman, M Sachdev
IEEE Transactions on Circuits and Systems II: Express Briefs 62 (4), 387-391, 2014
582014
Interactive online tutorial assistance for a first programming course
CCW Hulls, AJ Neale, BN Komalo, V Petrov, DJ Brush
IEEE Transactions on Education 48 (4), 719-728, 2005
322005
Neutron radiation induced soft error rates for an adjacent-ECC protected SRAM in 28 nm CMOS
A Neale, M Sachdev
IEEE Transactions on Nuclear Science 63 (3), 1912-1917, 2016
312016
8T1R: A novel low-power high-speed RRAM-based non-volatile SRAM design
AMST Abdelwahed, A Neale, M Anis, L Wei
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 239-244, 2016
292016
Hybrid latch-type offset tolerant sense amplifier for low-voltage SRAMs
D Patel, A Neale, D Wright, M Sachdev
IEEE Transactions on Circuits and Systems I: Regular Papers 66 (7), 2519-2532, 2019
152019
Body biased sense amplifier with auto-offset mitigation for low-voltage SRAMs
D Patel, A Neale, D Wright, M Sachdev
IEEE Transactions on Circuits and Systems I: Regular Papers 68 (8), 3265-3278, 2021
142021
A reliability overview of Intel’s 10+ logic technology
R Grover, T Acosta, C AnDyke, E Armagan, C Auth, S Chugh, K Downes, ...
2020 IEEE International Reliability Physics Symposium (IRPS), 1-6, 2020
122020
Design and analysis of an adjacent multi-bit error correcting code for nanoscale SRAMs
A Neale
University of Waterloo, 2014
122014
Digitally programmable SRAM timing for nano-scale technologies
A Neale, M Sachdev
2011 12th International Symposium on Quality Electronic Design, 1-7, 2011
82011
A low energy SRAM-based physically unclonable function primitive in 28 nm CMOS
A Neale, M Sachdev
2015 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2015
72015
Digital timing control in SRAMs for yield enhancement and graceful aging degradation
A Neale
University of Waterloo, 2010
72010
A 0.4 V 75 kbit SRAM macro in 28 nm CMOS featuring a 3-adjacent MBU correcting ECC
A Neale, M Sachdev
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 1-4, 2014
62014
On the correlation of laser-induced and high-energy proton beam-induced single event latchup
B Ajdari, S Sekwao, R Ascazubi, A Neale, N Seifert
2020 IEEE International Reliability Physics Symposium (IRPS), 1-5, 2020
52020
The Road to Success for STEM Student-Athletes
A Neale, O Grant, M Sachdev
2012 ASEE Annual Conference & Exposition, 25.1336. 1-25.1336. 26, 2012
32012
On the efficacy of using proton beams for estimating neutron-induced soft error rates
S Jahinuzzaman, N Seifert, S Sekwao, A Neale
2017 IEEE International Reliability Physics Symposium (IRPS), SE-6.1-SE-6.6, 2017
22017
A Chip-Level Single-Event Latchup (SEL) Estimation Methodology
A Neale, N Seifert
IEEE Transactions on Nuclear Science 67 (1), 15-21, 2019
12019
Online Computer Simulation Tools For Dipole Antenna Radiation Patterns
A Neale, J Shirtliff, W Bishop, CS Rios
2007 Annual Conference & Exposition, 12.1125. 1-12.1125. 14, 2007
2007
AC 2007-1062: ONLINE COMPUTER SIMULATION TOOLS FOR DIPOLE ANTENNA RADIATION PATTERNS
A Neale, J Shirtliff, W Bishop, CS Rios
age 12, 1, 2007
2007
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