| Emerging reconfigurable nanotechnologies: Can they support future electronics? S Rai, S Srinivasa, P Cadareanu, X Yin, XS Hu, PE Gaillardon, ... 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2018 | 32 | 2018 |
| A predictive process design kit for three-independent-gate field-effect transistors G Gore, P Cadareanu, E Giacomin, PE Gaillardon 2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration …, 2019 | 30 | 2019 |
| A novel TIGFET-based DFF design for improved resilience to power side-channel attacks MM Sharifi, R Rajaei, P Cadareanut, PE Gaillardon, Y Jin, M Niemier, ... 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2020 | 16 | 2020 |
| Parasitic capacitance analysis of three-independent-gate field-effect transistors P Cadareanu, J Romero-Gonzalez, PE Gaillardon IEEE Journal of the Electron Devices Society 9, 400-408, 2021 | 14 | 2021 |
| A TCAD simulation study of three-independent-gate field-effect transistors at the 10-nm node P Cadareanu, PE Gaillardon IEEE Transactions on Electron Devices 68 (8), 4129-4135, 2021 | 12 | 2021 |
| A RRAM-based FPGA for Energy-efficient Edge Computing X Tang, E Giacomin, P Cadareanu, G Gore, PE Gaillardon 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 144 …, 2020 | 11 | 2020 |
| Nanoscale three-independent-gate transistors: Geometric TCAD simulations at the 10 nm-node P Cadareanu, PE Gaillardon 2019 IEEE 14th Nanotechnology Materials and Devices Conference (NMDC), 1-4, 2019 | 5 | 2019 |
| A novel high-gain amplifier circuit using super-steep-subthreshold-slope field-effect transistors M Couriol, P Cadareanu, E Giacomin, PE Gaillardon 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration …, 2021 | 4 | 2021 |
| Rebooting our computing models P Cadareanu, CG Almudever, A Khanna, A Raychowdhury, S Datta, ... 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2019 | 3 | 2019 |
| Silicon Photonic Devices Manufactured using Double-Patterned i-Line Lithography P Cadareanu Journal of the Microelectronic Engineering Conference 22 (1), 15, 2016 | 2 | 2016 |
| A predictive process design kit for three-independent-gate field-effect transistors P Cadareanu, G Gore, E Giacomin, PE Gaillardon VLSI-SoC: New Technology Enabler: 27th IFIP WG 10.5/IEEE International …, 2020 | 1 | 2020 |
| A quantum simulation study of iii-v esaki diodes and 2d tunneling field-effect transistors P Cadareanu Rochester Institute of Technology, 2018 | 1 | 2018 |
| More Wobble: Daniel Dennett's Elbow Room Unscrambled P Cadareanu | 1 | 2016 |
| A Process Tuning Analysis for the Three-Independent-Gate Field-Effect Transistor P Cadareanu, OT Lam, PE Gaillardon 2023 IEEE Nanotechnology Materials and Devices Conference (NMDC), 630-633, 2023 | | 2023 |
| A First Approach in Using Super-Steep-Subthreshold-Slope Field-Effect Transistors in Ultra-Low Power Analog Design M Couriol, P Cadareanu, E Giacomin, PE Gaillardon IFIP/IEEE International Conference on Very Large Scale Integration-System on …, 2021 | | 2021 |
Pierre - Emmanuel GAILLARDONAssociate Professor, University of UtahVerified email at utah.edu
