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Edouard Giacomin
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SpinalFlow: an architecture and dataflow tailored for spiking neural networks
S Narayanan, K Taht, R Balasubramonian, E Giacomin, PE Gaillardon
2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture …, 2020
652020
Gencache: Leveraging in-cache operators for efficient sequence alignment
A Nag, CN Ramachandra, R Balasubramonian, R Stutsman, E Giacomin, ...
Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019
572019
A robust digital RRAM-based convolutional block for low-power image processing and learning applications
E Giacomin, T Greenberg-Toledo, S Kvatinsky, PE Gaillardon
IEEE Transactions on Circuits and Systems I: Regular Papers 66 (2), 643-654, 2018
532018
OpenFPGA: An opensource framework enabling rapid prototyping of customizable FPGAs
X Tang, E Giacomin, A Alacchi, B Chauviere, PE Gaillardon
2019 29th International Conference on Field Programmable Logic and …, 2019
482019
Wire-aware architecture and dataflow for cnn accelerators
S Gudaparthi, S Narayanan, R Balasubramonian, E Giacomin, ...
Proceedings of the 52nd annual ieee/acm international symposium on …, 2019
412019
OpenFPGA: An open-source framework for agile prototyping customizable FPGAs
X Tang, E Giacomin, B Chauviere, A Alacchi, PE Gaillardon
IEEE Micro 40 (4), 41-48, 2020
372020
A predictive process design kit for three-independent-gate field-effect transistors
G Gore, P Cadareanu, E Giacomin, PE Gaillardon
2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration …, 2019
292019
A study on switch block patterns for tileable FPGA routing architectures
X Tang, E Giacomin, A Alacchi, PE Gaillardon
2019 International Conference on Field-Programmable Technology (ICFPT), 247-250, 2019
272019
Low-power multiplexer designs using three-independent-gate field effect transistors
E Giacomin, JR Gonzalez, PE Gaillardon
2017 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH …, 2017
212017
Differential power analysis mitigation technique using three-independent-gate field effect transistors
E Giacomin, PE Gaillardon
2018 IFIP/IEEE International Conference on Very Large Scale Integration …, 2018
202018
Circuit designs of high-performance and low-power RRAM-based multiplexers based on 4T (ransistor) 1R (RAM) programming structure
X Tang, E Giacomin, G De Micheli, PE Gaillardon
IEEE Transactions on Circuits and Systems I: Regular Papers 64 (5), 1173-1186, 2016
192016
FPGA-SPICE: A simulation-based architecture evaluation framework for FPGAs
X Tang, E Giacomin, G De Micheli, PE Gaillardon
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (3), 637-650, 2018
182018
Post-P&R performance and power analysis for RRAM-based FPGAs
X Tang, E Giacomin, G De Micheli, PE Gaillardon
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 8 (3 …, 2018
162018
A product engine for energy-efficient execution of binary neural networks using resistive memories
J Vieira, E Giacomin, Y Qureshi, M Zapater, X Tang, S Kvatinsky, ...
2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration …, 2019
112019
A RRAM-based FPGA for Energy-efficient Edge Computing
X Tang, E Giacomin, P Cadareanu, G Gore, PE Gaillardon
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 144 …, 2020
102020
Spinalflow: An architecture and dataflow tailored for spiking neural networks. In 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA)
S Narayanan, K Taht, R Balasubramonian, E Giacomin, PE Gaillardon
IEEE, 349ś362, 2020
92020
A resistive random access memory addon for the ncsu freepdk 45 nm
E Giacomin, PE Gaillardon
IEEE Transactions on Nanotechnology 18, 68-72, 2018
62018
Physical design considerations of one-level RRAM-based routing multiplexers
X Tang, E Giacomin, G De Micheli, PE Gaillardon
Proceedings of the 2017 ACM on International Symposium on Physical Design, 47-54, 2017
62017
A multiply-and-accumulate array for machine learning applications based on a 3D nanofabric flow
E Giacomin, S Gudaparthi, J Boemmels, R Balasubramonian, F Catthoor, ...
IEEE Transactions on Nanotechnology 20, 873-882, 2021
52021
Smart-redundancy: An alternative SEU/SET mitigation method for FPGAs
A Alacchi, E Giacomin, X Tang, PE Gaillardon
2021 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2021
52021
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