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Wenda Zhao
Wenda Zhao
Apple Inc.
Verified email at utexas.edu
Title
Cited by
Cited by
Year
A 13.5-ENOB, 107-μW Noise-Shaping SAR ADC With PVT-Robust Closed-Loop Dynamic Amplifier
X Tang, X Yang, W Zhao, CK Hsu, J Liu, L Shen, A Mukherjee, W Shi, S Li, ...
IEEE Journal of Solid-State Circuits 55 (12), 3248-3259, 2020
742020
A 0.025-mm2 0.8-V 78.5-dB SNDR VCO-Based Sensor Readout Circuit in a Hybrid PLL- M Structure
W Zhao, S Li, B Xu, X Yang, X Tang, L Shen, N Lu, DZ Pan, N Sun
IEEE Journal of Solid-State Circuits 55 (3), 666-679, 2019
592019
A 13-bit 0.005-mm2 40-MS/s SAR ADC With kT/C Noise Cancellation
J Liu, X Tang, W Zhao, L Shen, N Sun
IEEE Journal of Solid-State Circuits 55 (12), 3260-3270, 2020
492020
9.5 A 13.5 b-ENOB Second-Order Noise-Shaping SAR with PVT-Robust Closed-Loop Dynamic Amplifier
X Tang, X Yang, W Zhao, CK Hsu, J Liu, L Shen, A Mukherjee, W Shi, ...
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 162-164, 2020
452020
18.2 A 16fJ/Conversion-Step Time-Domain Two-Step Capacitance-to-Digital Converter
X Tang, S Li, L Shen, W Zhao, X Yang, R Williams, J Liu, Z Tan, N Hall, ...
2019 IEEE International Solid-State Circuits Conference-(ISSCC), 296-297, 2019
312019
16.5 A 13b 0.005mm2 40MS/s SAR ADC with kT/C Noise Cancellation
J Liu, X Tang, W Zhao, L Shen, N Sun
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 258-260, 2020
282020
A Two-Step ADC With a Continuous-Time SAR-Based First Stage
L Shen, Y Shen, Z Li, W Shi, X Tang, S Li, W Zhao, M Zhang, Z Zhu, N Sun
IEEE Journal of Solid-State Circuits 54 (12), 3375-3385, 2019
282019
A Second-Order Purely VCO-Based CT ADC Using a Modified DPLL Structure in 40-nm CMOS
Y Zhong, S Li, X Tang, L Shen, W Zhao, S Wu, N Sun
IEEE Journal of Solid-State Circuits 55 (2), 356-368, 2019
262019
An Energy-Efficient Time-Domain Incremental Zoom Capacitance-to-Digital Converter
X Tang, S Li, X Yang, L Shen, W Zhao, RP Williams, J Liu, Z Tan, NA Hall, ...
IEEE Journal of Solid-State Circuits 55 (11), 3064-3075, 2020
222020
A 10-bit 120-MS/s SAR ADC With Reference Ripple Cancellation Technique
Y Shen, X Tang, L Shen, W Zhao, X Xin, S Liu, Z Zhu, VS Sathe, N Sun
IEEE Journal of Solid-State Circuits 55 (3), 680-692, 2019
212019
A 51-pJ/Pixel 33.7-dB PSNR 4 Compressive CMOS Image Sensor With Column-Parallel Single-Shot Compressive Sensing
C Park, W Zhao, I Park, N Sun, Y Chae
IEEE Journal of Solid-State Circuits 56 (8), 2503-2515, 2021
202021
3.4 A 0.01mm2 25W 2MS/s 74dB-SNDR Continuous-Time Pipelined-SAR ADC with 120fF Input Capacitor
L Shen, Y Shen, X Tang, CK Hsu, W Shi, S Li, W Zhao, A Mukherjee, ...
2019 IEEE International Solid-State Circuits Conference-(ISSCC), 64-66, 2019
202019
A 77.1-dB-SNDR 6.25-MHz-BW Pipeline SAR ADC With Enhanced Interstage Gain Error Shaping and Quantization Noise Shaping
CK Hsu, X Tang, J Liu, R Xu, W Zhao, A Mukherjee, TR Andeen, N Sun
IEEE Journal of Solid-State Circuits 56 (3), 739-749, 2020
182020
A 0.025-mm2 0.8-V 78.5dB-SNDR VCO-Based Sensor Readout Circuit in a Hybrid PLL-ΔΣM Structure
S Li, W Zhao, B Xu, X Yang, X Tang, L Shen, N Lu, DZ Pan, N Sun
2019 IEEE Custom Integrated Circuits Conference (CICC), 1-3, 2019
142019
Biochemical sensing by nanofluidic crystal in a confined space
W Zhao, B Wang, W Wang
Lab on a Chip 16 (11), 2050-2058, 2016
132016
An 81.5 dB-DR 1.25 MHz-BW VCO-Based CT ΔΣ ADC with Double-PFD Quantizer
Y Zhong, X Tang, J Liu, W Zhao, S Li, N Sun
2021 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2021
122021
10.4 A 3.7 mW 12.5 MHz 81dB-SNDR 4th-Order CTDSM with Single-OTA and 2nd-Order NS-SAR
W Shi, J Liu, A Mukherjee, X Yang, X Tang, L Shen, W Zhao, N Sun
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 170-172, 2021
122021
A 3.7-mW 12.5-MHz 81-dB SNDR 4th-Order Continuous-Time DSM With Single-OTA and 2nd-Order Noise-Shaping SAR
W Shi, J Liu, A Mukherjee, X Yang, X Tang, L Shen, W Zhao, N Sun
IEEE Open Journal of the Solid-State Circuits Society 2, 122-134, 2022
52022
An Always-on 4 Compressive VGA CMOS Imager with 51pJ/Pixel and> 32dB PSNR
W Zhao, C Park, I Park, N Sun, Y Chae
2020 IEEE Symposium on VLSI Circuits, 1-2, 2020
42020
A 77.1-dB 6.25-MHz-BW Pipeline SAR ADC with Enhanced Interstage Gain Error Shaping and Quantization Error Shaping
CK Hsu, X Tang, W Zhao, R Xu, A Mukherjee, TR Andeen, N Sun
2020 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2020
42020
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