Characterization of the variable retention time in dynamic random access memory H Kim, B Oh, Y Son, K Kim, SY Cha, JG Jeong, SJ Hong, H Shin IEEE Transactions on Electron Devices 58 (9), 2952-2958, 2011 | 31 | 2011 |
Characterization of an oxide trap leading to random telegraph noise in gate-induced drain leakage current of DRAM cell transistors B Oh, HJ Cho, H Kim, Y Son, T Kang, S Park, S Jang, JH Lee, H Shin IEEE transactions on electron devices 58 (6), 1741-1747, 2011 | 30 | 2011 |
Improvement by Controlling Extrinsic Parasitics in Circuit-Level MOS Transistor HS Jhon, JH Lee, J Lee, B Oh, I Song, Y Yun, BG Park, JD Lee, H Shin IEEE Electron Device Letters 30 (12), 1323-1325, 2009 | 25 | 2009 |
Investigation of Gate Etch Damage at Metal/High- Gate Dielectric Stack Through Random Telegraph Noise in Gate Edge Direct Tunneling Current HJ Cho, Y Son, B Oh, S Jang, JH Lee, BG Park, H Shin IEEE Electron Device Letters 32 (4), 569-571, 2011 | 24 | 2011 |
Electronic device BC Oh, YJ Shin US Patent 9,437,289, 2016 | 18 | 2016 |
Study of trap models related to the variable retention time phenomenon in DRAM H Kim, B Oh, Y Son, K Kim, SY Cha, JG Jeong, SJ Hong, H Shin IEEE transactions on electron devices 58 (6), 1643-1648, 2011 | 18 | 2011 |
Enhancing dram self-refresh for idle power reduction B Oh, N Abeyratne, J Ahn, RG Dreslinski, T Mudge Proceedings of the 2016 International Symposium on Low Power Electronics and …, 2016 | 16 | 2016 |
Delay locked loop DH Jung, J Kim, KH Ryu, SO Jung, BC Oh US Patent 9,154,140, 2015 | 16 | 2015 |
Characterization of border trap density with the multifrequency charge pumping technique in dual-layer gate oxide Y Son, S Park, T Kang, B Oh, H Shin IEEE transactions on electron devices 58 (8), 2752-2758, 2011 | 14 | 2011 |
Study on time constants of random telegraph noise in gate leakage current through hot-carrier stress test HJ Cho, Y Son, BC Oh, S Lee, JH Lee, BG Park, H Shin IEEE electron device letters 31 (9), 1029-1031, 2010 | 14 | 2010 |
Resistance change memory M Takahashi, A Katayama, DK Kim, BC Oh US Patent 9,001,559, 2015 | 10 | 2015 |
Random telegraph signal-like fluctuation created by Fowler–Nordheim stress in gate induced drain leakage current of the saddle type dynamic random access memory cell transistor H Kim, B Oh, K Kim, SY Cha, JG Jeong, SJ Hong, JH Lee, BG Park, ... Japanese Journal of Applied Physics 49 (9R), 094102, 2010 | 10 | 2010 |
Observation of slow oxide traps at MOSFETs having metal/high-k gate dielectric stack in accumulation mode HJ Cho, Y Son, B Oh, S Lee, JH Lee, BG Park, H Shin IEEE transactions on electron devices 57 (10), 2697-2703, 2010 | 10 | 2010 |
Electronic device including semiconductor memory and operation method thereof BC Oh, JH Bae, K Fujita, Y Shirai US Patent App. 14/560,819, 2015 | 9 | 2015 |
Resistance change memory A Katayama, M Takahashi, T Inaba, HS Yim, DK Kim, BC Oh, JW Lee US Patent 9,741,434, 2017 | 8 | 2017 |
Checkpointing exascale memory systems with existing memory technologies N Abeyratne, HM Chen, B Oh, R Dreslinski, C Chakrabarti, T Mudge Proceedings of the Second International Symposium on Memory Systems, 18-29, 2016 | 8 | 2016 |
Electronic device and method for operating the same BC Oh US Patent 9,384,828, 2016 | 8 | 2016 |
Enhanced Memory Device B Oh, S Abeyratne, RG Dreslinski, T Mudge US Patent 10,002,657, 2017 | 7 | 2017 |
Voltage converter J Kim, DH Jung, KH Ryu, SO Jung, BC Oh US Patent 9,413,236, 2016 | 5 | 2016 |
Rethinking DRAM's page mode with STT-MRAM B Oh, N Abeyratne, NS Kim, J Ahn, RG Dreslinski, T Mudge IEEE Transactions on Computers 72 (5), 1503-1517, 2022 | 4 | 2022 |