Self-correcting STTRAM under magnetic field attacks JW Jang, J Park, S Ghosh, S Bhunia Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015 | 49 | 2015 |
Design and analysis of novel SRAM PUFs with embedded latch for robustness JW Jang, S Ghosh Sixteenth international symposium on quality electronic design, 298-302, 2015 | 40 | 2015 |
MTJ-based state retentive flip-flop with enhanced-scan capability to sustain sudden power failure AS Iyengar, S Ghosh, JW Jang IEEE Transactions on Circuits and Systems I: Regular Papers 62 (8), 2062-2068, 2015 | 37 | 2015 |
Security and privacy threats to on-chip non-volatile memories and countermeasures S Ghosh, MNI Khan, A De, JW Jang 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-6, 2016 | 35 | 2016 |
Spintronic PUFs for security, trust, and authentication A Iyengar, S Ghosh, K Ramclam, JW Jang, CW Lin ACM Journal on Emerging Technologies in Computing Systems (JETC) 13 (1), 1-15, 2016 | 20 | 2016 |
Overview of circuits, systems, and applications of spintronics S Ghosh, A Iyengar, S Motaman, R Govindaraj, JW Jang, J Chung, J Park, ... IEEE Journal on Emerging and Selected Topics in Circuits and Systems 6 (3 …, 2016 | 13 | 2016 |
Threshold defined camouflaged gates in 65nm technology for reverse engineering protection AS Iyengar, D Vontela, I Reddy, S Ghosh, S Motaman, J Jang Proceedings of the International Symposium on Low Power Electronics and …, 2018 | 12 | 2018 |
Investigation of magnetic field attacks on commercial Magneto-Resistive Random Access Memory A Holst, JW Jang, S Ghosh 2017 18th International Symposium on Quality Electronic Design (ISQED), 155-160, 2017 | 11 | 2017 |
Performance impact of magnetic and thermal attack on STTRAM and low-overhead mitigation techniques JW Jang, S Ghosh Proceedings of the 2016 International Symposium on Low Power Electronics and …, 2016 | 11 | 2016 |
Threshold-defined logic and interconnect for protection against reverse engineering JW Jang, A De, D Vontela, I Nirmala, S Ghosh, A Iyengar IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 5 | 2018 |
Non-volatile flip-flop with enhanced-scan capability to sustain sudden power failure S Ghosh, AS Iyengar, JW Jang US Patent 9,728,241, 2017 | 5 | 2017 |
Verification of Functional Correctness of Code Diversification Techniques JW Jang, F Verbeek, B Ravindran NASA Formal Methods Symposium, 160-179, 2021 | 1 | 2021 |
Schmitt-trigger-based recycling sensor and robust and high-quality PUFs for counterfeit IC detection CW Lin, JW Jang, S Ghosh arXiv preprint arXiv:1505.03213, 2015 | 1 | 2015 |
Security of Non-Volatile Memories—Attack Models, Analyses, and Counter-Measures JW Jang University of South Florida, 2015 | 1 | 2015 |
sMVX: Multi-Variant Execution on Selected Code Paths SM Yeoh, X Wang, JW Jang, B Ravindran Proceedings of the 25th International Middleware Conference, 62-73, 2024 | | 2024 |
Enhancing Software Security through Code Diversification Verification, Control-flow Restriction, and Automatic Compartmentalization JW Jang Virginia Tech, 2024 | | 2024 |
A Reference-less Slope Detection Technique in 65nm for Robust Sensing of 1T1R Arrays S Motaman, S Ghosh, JW Jang, A Iyengar, R Govindaraj, Z Khondker arXiv preprint arXiv:2306.03972, 2023 | | 2023 |
EMERGING MEMORIES—TECHNOLOGY, ARCHITECTURE, AND APPLICATIONS—SECOND ISSUE S Ghosh, RV Joshi, D Somasekhar, X Li, A Iyengar, H Motaman, ... | | |