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Shahzad Asif
Shahzad Asif
Verified email at city.westernsydney.edu.au
Title
Cited by
Cited by
Year
Chaos based Zero-steganography algorithm
M Bilal, S Imtiaz, W Abdul, S Ghouzali, S Asif
Multimedia tools and applications 72 (2), 1073-1092, 2014
432014
Design of an algorithmic Wallace multiplier using high speed counters
S Asif, Y Kong
2015 Tenth international conference on computer engineering & systems (ICCES …, 2015
422015
Low-area Wallace multiplier
S Asif, Y Kong
Vlsi Design 2014, 2014
322014
Highly parallel modular multiplier for elliptic curve cryptography in residue number system
S Asif, Y Kong
Circuits, Systems, and Signal Processing 36 (3), 1027-1051, 2017
242017
A fully RNS based ECC processor
S Asif, MS Hossain, Y Kong, W Abdul
Integration 61, 138-149, 2018
212018
High‐throughput multi‐key elliptic curve cryptosystem based on residue number system
S Asif, MS Hossain, Y Kong
IET Computers & Digital Techniques 11 (5), 165-172, 2017
202017
Analysis of different architectures of counter based Wallace multipliers
S Asif, Y Kong
2015 Tenth International Conference on Computer Engineering & Systems (ICCES …, 2015
182015
Modular multiplication using the core function in the residue number system
Y Kong, S Asif, MAU Khan
Applicable Algebra in Engineering, Communication and Computing 27 (1), 1-16, 2016
172016
Performance analysis of Wallace and radix-4 Booth-Wallace multipliers
S Asif, Y Kong
2015 Electronic System Level Synthesis Conference (ESLsyn), 17-22, 2015
142015
65‐nm CMOS low‐energy RNS modular multiplier for elliptic‐curve cryptography
S Asif, O Andersson, J Rodrigues, Y Kong
IET Computers & Digital Techniques 12 (2), 62-67, 2018
62018
Performance analysis of radix-4 adders
S Asif, M Vesterbacka
Integration 45 (2), 111-120, 2012
42012
Reduction of substrate noise in sub clock frequency range
SMY Sherazi, S Asif, E Backenius, M Vesterbacka
IEEE Transactions on Circuits and Systems I: Regular Papers 57 (6), 1287-1297, 2009
42009
High-speed low-power modular arithmetic for elliptic curve cryptosystems based on the residue number system
S Asif
Sydney, Australia: Macquarie University, 2016
32016
A comparative analysis of LDPC decoders for image transmission over AWGN channel
SA Qazi, M Shoaib, U Javaid, S Asif
Proceedings of the 7th international conference on frontiers of information …, 2009
22009
Power efficient scalable hybrid processor architecture
M Bilal, S Imtiaz, S Asif, W Abdul
2012 Second International Conference on Digital Information and …, 2012
12012
An RNS based modular multiplier with reduced complexity
S Asif, M Vesterbacka
2017 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and …, 2017
2017
Reduction of Simultaneous Switching Noise in Analog Signal Band on a Chip
SMY Sherazi, S Asif
Institutionen för systemteknik, 2008
2008
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Articles 1–17